Q. 51 A 1-to-8 demultiplexer with data input 
, address inputs 
(with 
as the LSB) and
as the eight demultiplexed output, is to be designed using two 2-to-4 decoders (with enable input 
and address input
) as shown in the figure , are to be connected to P, Q, R, and S , but not necessarily in this order. The respective input connections to P, Q, R and S terminals should be
(A) S2, Din , S0, S1
(B) S1, Din , S0, S2
(C) Din , S0, S1, S2
(D) Din , S2, S0, S1
Answer: (D)
Explanation:
