Gate EC-2016 – 3 Question Paper With Solutions

Q.55 For the circuit shown in the figure, the delay of the bubbled NAND gate is 2ns and that of the counter is assumed to be zero

Gate EC-2016 - 3 Question Paper With Solutions
If the clock (C1k) frequency is 1Ghz, the counter behaves as a

(A) mod-5 counter

(B) mod-6 counter

(C) mod-7 counter

(D) mod-8 counter

Answer: (D)

Explanation:Gate EC-2016 - 3 Question Paper With Solutions

Learn More:   Gate EC-2020 Question Paper With Solutions

LEAVE A REPLY

Please enter your comment!
Please enter your name here