Q. 59 In the circuit shown in the figure, A is parallel-in, parallel-out 4 bit register, which loads at the rising edge of the clock C . The input lines are connected to a 4 bit bus, W. Its output acts at input to a 16 # 4 ROM whose output is floating when the input to a partial table of the contents of the ROM is as follows
The clock to the register is shown, and the data on the W bus at time t1 is 0110. The data on the bus at time t2 is
(A) 1111
(B) 1011
(C) 1000
(D) 0010
Answer: (C)
Explanation:
